FPGA-based vector processor for algebraic equation solvers

Author

Yang, Hongyan ; Ziavras, Sotirios G.

Author_Institution

Dept. of Electr. & Comput. Eng., New Jersey Inst. of Technol., Newark, NJ

fYear

2005

fDate

19-23 Sept. 2005

Firstpage

115

Lastpage

116

Abstract

In this paper, a vector unit tightly coupled with a five-stage pipelined scalar processor is designed and implemented on an FPGA platform. This system supports IEEE 754 single-precision floating-point calculations and sparse matrix operations. The W-matrix linear equation solution method for sparse systems is run on this vector processor. The obtained performance demonstrates that large linear algebraic equations, a great challenge to general-purpose processors, can be solved efficiently on our vector processor

Keywords

field programmable gate arrays; floating point arithmetic; logic design; microprocessor chips; pipeline processing; vector processor systems; FPGA platform; IEEE 754 single precision floating point calculations; W-matrix linear equation solution method; algebraic equation solvers; five-stage pipelined scalar processor; general purpose processors; linear algebraic equations; sparse matrix operations; sparse systems; vector processor; Computer architecture; Equations; Field programmable gate arrays; Logic design; Parallel processing; Process design; Registers; Sparse matrices; VLIW; Vector processors;

fLanguage

English

Publisher

ieee

Conference_Titel

SOC Conference, 2005. Proceedings. IEEE International

Conference_Location

Herndon, VA

Print_ISBN

0-7803-9264-7

Type

conf

DOI

10.1109/SOCC.2005.1554475

Filename

1554475