Title :
Hierarchical self-test concept based on the JTAG standard
Author :
Maierhofer, Johann
Author_Institution :
Siemens AG, Munich, Germany
Abstract :
The author describes the concept and setup of a hierarchical self-test architecture, which includes the entire system, module, device, and macrocell levels. The concept is based on a hierarchy of controllers, which control the self-test on each level. Between the levels, test buses are used for transporting test information. The self-test architecture is explained in detail at the device and macrocell levels. The IEEE Std. 1149.1 aimed at by JTAG (Joint Test Action Group) forms the test interface between the device and the module
Keywords :
automatic test equipment; automatic testing; computer architecture; computer interfaces; hierarchical systems; modules; standards; IEEE Std. 1149.1; JTAG standard; Joint Test Action Group; controllers; hierarchical self-test architecture; macrocell; test buses; test information; test interface; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Costs; Macrocell networks; Nails; Standardization; Standards development; Test pattern generators;
Conference_Titel :
Test Conference, 1990. Proceedings., International
Conference_Location :
Washington, DC
Print_ISBN :
0-8186-9064-X
DOI :
10.1109/TEST.1990.114010
