Title :
Coupling Advanced Atomistic Process and Device Modeling for Optimizing Future CMOS Devices
Author :
Colombeau, B. ; Yeong, S.H. ; Pandey, S.M. ; Benistant, F. ; Jaraiz, M. ; Chu, S.
Author_Institution :
Chartered Semicond. Manuf. Ltd, Singapore
Abstract :
For the first time, we show the coupling between advanced atomistic process and device modeling and its applicability for 65nm PMOS and NMOS technology. This technique can be used to simulate and get some important insights to improve and optimize future CMOS devices
Keywords :
MIS devices; MOSFET; semiconductor device models; semiconductor process modelling; 65 nm; CMOS devices optimization; NMOS technology; PMOS technology; atomistic process coupling; device modeling; Amorphous materials; Annealing; Boron; CMOS process; Calibration; MOS devices; Medical simulation; Predictive models; Semiconductor device modeling; Semiconductor process modeling;
Conference_Titel :
VLSI Technology, Systems, and Applications, 2006 International Symposium on
Conference_Location :
Hsinchu
Print_ISBN :
1-4244-0181-4
Electronic_ISBN :
1524-766X
DOI :
10.1109/VTSA.2006.251105
