Boundary scan test used at board level: moving towards reality

Author

De Jong, Frans

Author_Institution

Nederlandse Philips Bedrijven BV, Eindhoven, Netherlands

fYear

1990

fDate

10-14 Sep 1990

Firstpage

235

Lastpage

242

Abstract

The author addresses the need for adapted design and test tools when using boundary scan in board-level circuit design and testing these assemblies. Test pattern generation is dealt with, the data flow around this generation software is discussed, and a format for test vectors is presented. Details are given for different approaches to test pattern generation, and a program for checking correctness of vectors is introduced. Also, a PC-based BST (boundary scan testing) validation tool capable of addressing the first needs of a designer is described. It is concluded that, although using BST pays off very rapidly, a lot of details in the total design and test trajectory have to be cleared up. Coupling between tools and availability of software capable of dealing with BST according to a selected strategy are items that have to be checked

Keywords

automatic testing; circuit layout CAD; logic testing; microcomputer applications; printed circuit testing; PC-based BST; PCB testing; board-level circuit design; boundary scan testing; data flow; software availability; test pattern generation; test vectors; testing; validation tool; Assembly; Binary search trees; Circuit testing; Design engineering; Design for testability; Hardware; Manufacturing automation; Prototypes; Software testing; Test pattern generators;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 1990. Proceedings., International

Conference_Location

Washington, DC

Print_ISBN

0-8186-9064-X

Type

conf

DOI

10.1109/TEST.1990.114022

Filename

114022