Bus Buffer Evaluation of Different Arbitration Algorithms

In this paper the authors evaluated bus buffer size of different arbitration algorithms according to a RISC microprocessor. Three arbitration algorithms have been tested: (a) static priority arbitration; (b) rotating priority arbitration; and (c) lottery bus arbitration. A high-level simulation model based on C++ has been developed and the simulations were based upon recorded real communication traces for more accurate results. It is shown that the rotating priority arbitration gives the better trade-off between the buffer size and the performance comparatively with the other two arbitration algorithms