Title :
The boundary-scan master: target applications and functional requirements
Author :
Yau, Chi W. ; Jarwala, Najmi
Author_Institution :
AT&T Bell Lab., Princeton, NJ, USA
Abstract :
The need for a parallel-serial bus interface chip (BSM) which supports the boundary-scan architecture is demonstrated. Various external and embedded applications for the BSM are identified. The external applications include low-cost testers and other trouble-shooting instruments, such as in-circuit emulators. The embedded applications encompass board- and system-level test and diagnostic support functions. For the embedded applications, further distinction is made between centralized and distributed test and diagnostic control mechanisms. A comprehensive list of requirements which support the BSM´s target applications is specified. A subset of the requirements is defined after a detailed design tradeoff analysis. It is demonstrated that, with the final feature set the BSM is able to meet the cost-performance, goals dictated by the anticipated applications
Keywords :
automatic test equipment; automatic testing; computer architecture; computer interfaces; electronic equipment testing; logic testing; printed circuit testing; PCB test; boundary-scan architecture; boundary-scan master; centralised test; cost-performance; diagnostic control; distributed test; embedded applications; go-no go test; in-circuit emulators; parallel-serial bus interface chip; system-level test; trouble-shooting instruments; Automatic testing; Centralized control; Instruments; Logic testing; Performance analysis; Performance evaluation; Software performance; Software testing; System testing; Throughput;
Conference_Titel :
Test Conference, 1990. Proceedings., International
Conference_Location :
Washington, DC
Print_ISBN :
0-8186-9064-X
DOI :
10.1109/TEST.1990.114037
