Realization of an efficient design verification test used on a microinstruction controlled self test

A unified test (UT), which realizes an efficient design verification test (EDVT) based on a microinstruction-controlled self-test (MST), is described. The EDVT features large flexibility of test data supply and high observability of response data from the macroblock, including exact AC performance information. Any macroblock which is checked by using the MST receives its benefits. Since the EDVT fully utilizes microinstruction control logic, the hardware overhead is almost the same as that of the MST. For obtaining an effective UT, it is desirable that the MST be implemented by using the masked microinstruction scheme. The UT is useful for both design verification test in the development stage and go/no-go test in the manufacturing stage. The importance of the UT in complicated VLSI microprocessors is discussed, and the basic structure and a few significant applications of the UT are described