DocumentCode
2723370
Title
Frequency enhancement of digital VLSI test systems
Author
Ackner, Leslie ; Barber, Mark R.
Author_Institution
AT&T Bell Lab., Allentown, PA, USA
fYear
1990
fDate
10-14 Sep 1990
Firstpage
444
Lastpage
451
Abstract
The authors first discuss the intrinsic frequency limitations of the wave formatters, DUT (device-under-test) drivers, and comparators in a typical 1980s 40-80-MHz test system, and in two lower cost (<K -per-pin) systems. They then explain how the frequency of operation can be enhanced up to 700 Mb/s with a, small amount of additional GaAs circuitry for multiplexing DUT drivers. In cases in which the comparators have a restricted bandwidth, an external GaAs comparator can be used. The technical limitations and cost considerations of frequency enhancement techniques are discussed
Keywords
III-V semiconductors; VLSI; comparators (circuits); digital integrated circuits; driver circuits; gallium arsenide; integrated circuit testing; multiplexing equipment; 40 to 80 MHz; 700 Mbit/s; GaAs; III-V semiconductor; comparators; digital VLSI test; intrinsic frequency limitations; multiplexing DUT drivers; wave formatters; Bandwidth; Circuit testing; Costs; Driver circuits; Frequency; Gallium arsenide; Manufacturing; Pins; System testing; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 1990. Proceedings., International
Conference_Location
Washington, DC
Print_ISBN
0-8186-9064-X
Type
conf
DOI
10.1109/TEST.1990.114053
Filename
114053
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