• DocumentCode
    2723709
  • Title

    Evaluation of back end of line structures underneath wirebond pads in ultra low-k device

  • Author

    Aoki, Toyohiro ; Hisada, Takashi ; Okamoto, Keishi ; Malinowski, John C. ; Beckham, Keith F. ; Yang, Yong-Seok ; Kim, Joon-Su ; Harada, Shinichi

  • Author_Institution
    Yamato Lab., IBM Japan, Yamato, Japan
  • fYear
    2012
  • fDate
    May 29 2012-June 1 2012
  • Firstpage
    1097
  • Lastpage
    1102
  • Abstract
    Mechanical integrity of back end of line structures underneath wirebond pads was evaluated using 32 nm ultra low-k device by wire pull testing and 3D finite element analysis. Pad tearout rate at wire pull testing was measured for various Cu line/via structures. One key factor for robust bond pads is effective modulus in ULK levels. In addition, increased via and wiring metal density reduces the risk of pad tearout. For the evaluated structures in this work, a calculated effective modulus in ULK was a better index than metal layout type for assessment of bond pad robustness in cooperation with finite element analysis data. Wirebonding is another key factor affecting pad tearout. In this work, effects of wirebond geometry (i.e. wire size and bond ball size) on pad tearout were focused rather than the effect of parameter itself. With the robust BEOL stack and appropriate wirebonding conditions, module level reliability of 35 μm ultra fine pitch wirebond on ultra low-k chip with circuit underneath bond pads was also demonstrated with a PBGA package.
  • Keywords
    ball grid arrays; integrated circuit metallisation; integrated circuit packaging; integrated circuit reliability; integrated circuit testing; lead bonding; mechanical testing; 3D finite element analysis; Cu; PBGA package; back end of line structure; mechanical integrity; metal layout; module level reliability; pad tearout rate; size 32 nm; size 35 mum; ultra fine pitch wirebond; ultra low-k chip; ultra low-k device; via structure; wire pull testing; wirebond pad; wirebonding condition; Bonding; Finite element methods; Metals; Stress; Testing; Wires; Wiring;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference (ECTC), 2012 IEEE 62nd
  • Conference_Location
    San Diego, CA
  • ISSN
    0569-5503
  • Print_ISBN
    978-1-4673-1966-9
  • Electronic_ISBN
    0569-5503
  • Type

    conf

  • DOI
    10.1109/ECTC.2012.6248972
  • Filename
    6248972