An experimental study on reject ratio prediction for VLSI circuits: Kokomo revisited

The authors report on an experiment to verify the accuracy of reject ratio predictions by the available approaches. The data collection effort includes instrumenting the wafer probe test to obtain chip failures as a function of applied vectors and running a fault simulator to obtain the cumulative fault coverage of these vectors. The accuracy of reject ratio predictions is judged by assuming earlier stopping points for the wafer probe, thereby gaining a measure of confidence in the final predicted value. The results of five different analyses are reported for over 70000 tested dies of a CMOS VLSI device. The five methods discussed predicted values for the reject ratio that vary by an order of magnitude at high values of fault coverage. It is shown that, with only an incremental effort during wafer probe, data collection that can be used to compare the relative accuracy of different models over a range of fault coverage is possible