DocumentCode
2724158
Title
Micro-interconnection reliability: Thermal, electrical and mechanical stress
Author
Wright, S.L. ; Tsang, C.K. ; Maria, J. ; Dang, B. ; Polastre, R. ; Andry, P. ; Knickerbocker, J.
Author_Institution
IBM T.J. Watson Res. Center, Yorktown Heights, NY, USA
fYear
2012
fDate
May 29 2012-June 1 2012
Firstpage
1278
Lastpage
1286
Abstract
The results of stress tests on 50 μm-pitch Pb-free microbump interconnect 3D Si structures are summarized. It was found that thermal processes alone compete strongly with electromigration at stress currents of 50 and 100 mA. Typical test sites exhibited a gradual increase in relative resistance increase over time. While large changes in bump interconnection resistance did occur for some sites, the interconnections were resistant to full open electrical failure, even after subjected to mechanical shock following long-term EM stress. Underfilled samples were more robust than non-underfilled samples. Overall, the results suggest that for application in 3D Si stacks, microbumps can support higher power densities than those used currently with standard pitch bump interconnections.
Keywords
semiconductor device metallisation; semiconductor device reliability; Pb-free microbump interconnect 3D Si structures; current 50 mA to 100 mA; electrical stress; long-term EM stress; mechanical shock; mechanical stress; microinterconnection reliability; power densities; relative resistance; size 50 mum; standard pitch bump interconnections; stress currents; thermal stress; Contact resistance; Electrical resistance measurement; Integrated circuit interconnections; Stress; Temperature measurement; Thermal resistance;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components and Technology Conference (ECTC), 2012 IEEE 62nd
Conference_Location
San Diego, CA
ISSN
0569-5503
Print_ISBN
978-1-4673-1966-9
Electronic_ISBN
0569-5503
Type
conf
DOI
10.1109/ECTC.2012.6249000
Filename
6249000
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