A finite element analysis of board level temperature cycling reliability of embedded wafer level BGA (eWLB) package

Three dimensional finite element analysis (FEA) is performed to assess the board level temperature cycling reliability for lead-free solder Sn_96.5Ag₃Cu_0.5 (SAC305) used in eWLB packages. With Anand viscoplastic constitutive model used for the solder material, the chosen damage parameters, i.e. accumulated creep strain or accumulated creep strain energy density, can be derived from the finite element analysis (FEA) models and then can be correlated with the solder fatigue life obtained from the temperature cycling tests. In this study, a surface-based tie constraint technique is employed in the FEA models to facilitate mesh transition requirements at various interfaces of incompatible meshes. It is particularly the case arising from the die edges overlie the circular solder pads in the models. To deal with such situations, the FEA model for the entire package-to-board assembly can be strategically split into two parts and then connected to each other with tie constraints for the ease of meshing effort. It is found that this technique can help in managing a more uniform mesh distribution over the regions of interest, such as solder joints and dielectric layers with refine meshes, and yet allow a relatively coarse mesh to be assigned elsewhere for model size reduction. Thus, the computational efficiency for these tie-constraint models can be improved significantly as compared with their corresponding single part models with fine meshes and yet the model accuracy for the critical solder joint fatigue life estimation can be preserved. A model validation and numerical case study will be provided to illustrate the application of this modeling technique.