• DocumentCode
    2724762
  • Title

    Design and implementation of a custom verification environment for fault injection and analysis on an embedded microprocessor

  • Author

    Ustaoglu, Buse ; Ors, Berna

  • Author_Institution
    Istanbul Tech. Univ., Istanbul, Turkey
  • fYear
    2015
  • fDate
    April 29 2015-May 1 2015
  • Firstpage
    256
  • Lastpage
    261
  • Abstract
    Embedded microprocessors are widely used in most of the safety critical digital system applications. A fault in a single bit in the microprocessors may cause soft errors. It has different affects on the program outcome whether the fault changes a situation in the application. In order to analyse the behaviour of the applications under the faulty conditions we have designed a custom verification system. The verification system has two parts as Field Programmable Gate Array (FPGA) and personnel computer (PC). We have modified Natalius open source microprocessor in order to inject stuck-at-faults into it. We have handled a fault injection method and leveraged it to increase randomness. On FPGA, we have implemented modified Natalius microprocessor, the fault injection method and the communication protocol. Then the “Most Significant Bit First Multiplication Algorithm” has been implemented on the microprocessor as an application. We have prepared an environment which sends inputs to and gets outputs from the Natalius microprocessor on PC part. Finally, we have analysed our application by injecting faults in specific location and random location in register file to make some classifications for effects of the injected faults.
  • Keywords
    embedded systems; fault location; field programmable gate arrays; microprocessor chips; FPGA; Natalius open source microprocessor; PC; application behaviour analysis; communication protocol; custom verification environment design; custom verification environment implementation; embedded microprocessor; fault analysis; faulty conditions; field programmable gate array; most-significant bit first-multiplication algorithm; personnel computer; random location; register file; safetycritical digital system applications; soft errors; specific location; stuck-at-fault injection; Algorithm design and analysis; Circuit faults; Fault location; Hardware; Microprocessors; Random access memory; Registers; Analysis; Design; Fault Injection; Microprocessor;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Technological Advances in Electrical, Electronics and Computer Engineering (TAEECE), 2015 Third International Conference on
  • Conference_Location
    Beirut
  • Print_ISBN
    978-1-4799-5679-1
  • Type

    conf

  • DOI
    10.1109/TAEECE.2015.7113636
  • Filename
    7113636