DocumentCode
2724967
Title
Geyser-1: A MIPS R3000 CPU core with fine grain runtime power gating
Author
Ikebuchi, D. ; Seki, N. ; Kojima, Y. ; Kamata, Mitsuru ; Zhao, L. ; Amano, H. ; Shirai, T. ; Koyama, S. ; Hashida, T. ; Umahashi, Y. ; Masuda, H. ; Usami, K. ; Takeda, S. ; Nakamura, H. ; Namiki, M. ; Kondo, M.
Author_Institution
Keio Univ., Yokohama, Japan
fYear
2009
fDate
16-18 Nov. 2009
Firstpage
281
Lastpage
284
Abstract
Geyser-1, a prototype MIPS R3000 CPU with fine grain runtime PG for major computational components in the execution stage is available. Function units such as CLU, shifter, multiplier and divider are power-gated and controlled at runtime such that only the function unit to be used is powered-on to minimize the leakage power. The evaluation results on the real chip reveals that the fine grain runtime PG mechanism works without electric problems. It reduces the leakage power 7% at 25°C and 24% at 80°C. The evaluation results using benchmark programs show that the power consumption can be reduced from 3% at 25°C and 30% at 80°C.
Keywords
data communication equipment; Geyser-1; MIPS R3000 CPU core; divider; fine grain runtime power gating; multiplier; power consumption; power leakage; shifter; temperature 25 degC; temperature 80 degC; Agriculture; Central Processing Unit; Delay; Energy consumption; Logic gates; Parasitic capacitance; Prototypes; Runtime; Sleep; Solid state circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2009. A-SSCC 2009. IEEE Asian
Conference_Location
Taipei
Print_ISBN
978-1-4244-4433-5
Electronic_ISBN
978-1-4244-4434-2
Type
conf
DOI
10.1109/ASSCC.2009.5357257
Filename
5357257
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