• DocumentCode
    2726100
  • Title

    Optimizing diagnostic verification processes

  • Author

    Shannon, Russell ; Knecht, John

  • Author_Institution
    Naval Air Syst. Command, Lakehurst, NJ, USA
  • fYear
    2010
  • fDate
    13-16 Sept. 2010
  • Firstpage
    1
  • Lastpage
    5
  • Abstract
    Demonstrations of avionics system and subsystem diagnostic capability are performed before a system or subsystem is verified. This ordinarily happens during the system design and demonstration phase of a program. In the case of aircraft or ground vehicles, there are several subsystem demonstrations, followed by a single system-level event. By the time a system or subsystem is ready for a functional demonstration of its diagnostic capability, there is already significant programmatic inertia towards achieving the next programmatic or contractual milestone. There is typically not enough available manpower, time-on-system, or even funding to test every possible fault in a given system or subsystem. Indeed, testing only the "relevant" faults, which the system\´s diagnostics have been built to address, can be a hugely time-consuming effort. Due to these constraints, diagnostic demonstrations are sometimes not conducted in a scientifically robust manner. Sometimes, certain testing techniques are used in an effort to expedite testing. These techniques include: emulating hardware faults and their detection circuitry in software, selecting only those faults which are easy to test or guaranteed to work, and choosing faults which do not significantly stress the diagnostics system. This paper describes a survey of diagnostic program managers in an attempt to characterize, and suggest remedies for, the time and budget-constrained fashion in which avionics diagnostics systems are functionally demonstrated today.
  • Keywords
    aircraft instrumentation; avionics; diagnostic expert systems; aircraft; avionics diagnostic systems; detection circuitry; diagnostic verification process; expedite testing; ground vehicles; hardware faults; programmatic inertia; relevant faults; single system-level event; subsystem diagnostic capability; time-consuming effort; Circuit faults; Companies; Government; Integrated circuit modeling; Personnel; Testing; Avionics diagnostics; M-demo; built-in test; verification;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    AUTOTESTCON, 2010 IEEE
  • Conference_Location
    Orlando, FL
  • ISSN
    1088-7725
  • Print_ISBN
    978-1-4244-7960-3
  • Type

    conf

  • DOI
    10.1109/AUTEST.2010.5613617
  • Filename
    5613617