Carrier-Based Approach: A Generous Strategy to Develop Compact Model of Non-Classical CMOS

As traditional CMOS is gradually approaching the limit of the bulk technology scaling, non-classical CMOS devices such as UTB-SOI, DG-MOSFET and MG structure provide a path to scale CMOS to the end of the Roadmap using new transistor structural designs. Compact modeling of such non-classical MOSFET devices calls for a fundamentally different approach from the conventional bulk CMOS because of the different device physics picture and unique physical effects in the new topology of the non-classical CMOS devices. This paper outlines the carrier-based approach: A generous strategy to develop the compact model of non-classical MOSFETs. It is shown that the carrier-based analytic models of UTB-SOI, DG and SRG MOSFETs can be developed in terms of the induced carrier concentration rather than the traditional surface potential or the charge variable. Based on an exact solution of the Poisson equation in various non-classical structures coupled to the Pao-Sah current formulation in terms of the carrier concentration, the different dependences of the surface potential, centric potential, inversion charge and the current on the silicon body thickness and the gate oxide are elucidated analytically and then the predicted IV characteristics are compared with the 2-D and 3-D numerical simulations. The analytical results of the model presented show in a good agreement with the numerical simulation, demonstrating the model is valid for all operation regions and traces the transition between them without any auxiliary variable and function