Title :
Impact of switch design on the application performance of cache-coherent multiprocessors
Author :
Bhuyan, L. ; Wang, H. ; Iyer, R. ; Kumar, A.
Author_Institution :
Dept. of Comput. Sci., Texas A&M Univ., College Station, TX, USA
fDate :
30 Mar-3 Apr 1998
Abstract :
The effect of switch design on the application performance of cache-coherent non-uniform memory access (CC-NUMA) multiprocessors is studied in detail. Wormhole routing and cut-through switching are evaluated for these shared-memory multiprocessors that employ an multistage interconnection network (MIN) and full map directory-based cache coherence protocol. The switch design also considers virtual channels and varying number of input buffers per switch. Based on this, four different switch architectures are presented and compared. The evaluation is based on execution-driven simulation using five different applications to capture the random bursty nature of the network traffic arrival. The round-robin memory management policy is implemented. The authors show that the use of cut-through switching with buffers and virtual channels improves the average message latency tremendously. The waiting times of messages at various stages of switches are also presented. Finally, they show the variation of stall times and execution times for these applications by varying the switch delay and wire width
Keywords :
cache storage; network routing; performance evaluation; shared memory systems; storage management; switching; virtual machines; CC-NUMA multiprocessor; application performance; cache-coherent non-uniform memory access multiprocessors; cut-through switching; execution times; execution-driven simulation; full map directory-based cache coherence protocol; input buffers; message waiting times; multistage interconnection network; random bursty network traffic arrival; round-robin memory management policy; shared-memory multiprocessors; stall times; switch architectures; switch delay; switch design; virtual channels; wire width; wormhole routing; Analytical models; Application software; Computer aided manufacturing; Delay; File servers; Memory management; Multiprocessor interconnection networks; Packet switching; Routing; Switches;
Conference_Titel :
Parallel Processing Symposium, 1998. IPPS/SPDP 1998. Proceedings of the First Merged International ... and Symposium on Parallel and Distributed Processing 1998
Conference_Location :
Orlando, FL
Print_ISBN :
0-8186-8404-6
DOI :
10.1109/IPPS.1998.669958