• DocumentCode
    2727168
  • Title

    Tracking-Vgs: A Temperature Compensation Technique to Implement all-MOS Reference Voltages

  • Author

    Cajueiro, João Paulo C ; Filho, Carlos Alberto dos Reis

  • Author_Institution
    Sch. of Electr. & Comput. Eng., Campinas State Univ.
  • fYear
    2006
  • fDate
    26-28 April 2006
  • Firstpage
    287
  • Lastpage
    291
  • Abstract
    A novel temperature compensation technique to implement reference voltages in CMOS circuits is described, starting from the theoretical basis up to results obtained from experimental verification of a test circuit. The proposed technique is based on the fact that, since the V GS voltage of a MOS transistor can either increase or decrease with increasing temperature depending on the operating channel current ID, a voltage with amplitude nVGS produced by a stack of n transistors can feature the same rate of change with the temperature as the VGS of a single transistor, provided the single transistor and the stack of n transistors are biased each with the appropriate channel currents. In such conditions, the difference between the two voltages is constant. An alternative to produce the mentioned nVGS voltage, instead of a stack of n transistors, is a floating gate transistor, whose equivalent VGS voltage can be adjusted by depositing charges in its floating gate. This is actually the preferred implementation of the proposed technique cause it adds the benefit of adjusting infield the amplitude of the reference voltage. Samples of a test circuit were fabricated in 0.35mum CMOS aiming at to validate the technique. Results have confirmed what was expected from the proposed technique: Measured from - 40 to 120degC the circuits have shown a temperature coefficient of circa 100ppm/%deg;C. While the insensitivity to the temperature obtained from the implemented reference voltage has not exceeded the current state of the art, which is about 1ppm/degC, the proposed technique contributes to the implementation of reference voltages that use only MOS transistors and that feature in-field adjustment
  • Keywords
    CMOS integrated circuits; MOSFET circuits; compensation; reference circuits; -40 to 120 C; 0.35 micron; CMOS circuits; MOS reference voltages; channel current; gate-source voltage; infield adjustment; temperature compensation technique; transistor stack; Bipolar transistors; CMOS technology; Circuit testing; Circuits and systems; Current density; MOSFETs; Photonic band gap; System testing; Temperature dependence; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Devices, Circuits and Systems, Proceedings of the 6th International Caribbean Conference on
  • Conference_Location
    Playa del Carmen
  • Print_ISBN
    1-4244-0041-4
  • Electronic_ISBN
    1-4244-0042-2
  • Type

    conf

  • DOI
    10.1109/ICCDCS.2006.250875
  • Filename
    4016904