DocumentCode :
2727502
Title :
Architectures and Design Methodologies for Very Low Power and Power Effective A/D Converters
Author :
Maloberti, Franco
Author_Institution :
Dept. of Electron., Pavia Univ.
fYear :
2006
fDate :
18-21 June 2006
Firstpage :
77
Lastpage :
80
Abstract :
The main goal of portable applications is obtaining data conversion with very low power consumption while maintaining acceptable resolution and linearity. This paper presents various design methods for achieving figure of merit of 1 pJ-conv or less, usable other than sigma-delta architectures in pipeline and successive approximation algorithms. Results of state-of-the art designs are presented
Keywords :
analogue-digital conversion; low-power electronics; A/D converters; data conversion; figure of merit; Algorithm design and analysis; Bandwidth; Consumer electronics; Data conversion; Delta-sigma modulation; Design methodology; Energy consumption; Frequency; Pipelines; Sampling methods; Figure of merit (FoM); Low-power;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2006 IEEE North-East Workshop on
Conference_Location :
Gatineau, Que.
Print_ISBN :
1-4244-0416-9
Electronic_ISBN :
1-4244-0417-7
Type :
conf
DOI :
10.1109/NEWCAS.2006.250894
Filename :
4016925
Link To Document :
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