A New Architecture of Adiabatic Reversible Logic Gates

This paper presents a new architecture of reversible Toffoli family gates based on the concept of adiabatic circuits. In particular, applicability of reversible energy recovery logic (RERL) is investigated in detail. Such an approach presents plausible reversible adiabatic logic constructed in CMOS technology, creating an alternative approach to reduction in power consumption. Simulations indicate that adiabatic implementation of reversible logic circuits in low-speed operation consumes much less energy than the complementary static CMOS circuits