A 190MHz IF, 400 MSample/s CMOS direct-conversion bandpass /spl Sigma//spl Delta/ modulator

Wireless receivers that digitize at the intermediate frequency (IF) offer more flexibility and programmability than do conventional fully analog superheterodyne receivers. Bandpass /spl Sigma//spl Delta/ modulators are a promising technique for digitizing narrow-band IF signals; however, conventional CMOS modulators are inadequate with current technology when the IF frequency is in excess of 70 MHz. Existing bandpass /spl Sigma//spl Delta/ modulators are implemented either in discrete-time (DT), typically using switched-capacitor (SC) circuits, or in continuous-time (CT) using integrated active filter circuits. A recently proposed direct-conversion bandpass /spl Sigma//spl delta/ modulator provides an alternative solution to the aforementioned problems. In this approach, in-loop frequency translation is exploited as well as mixed CT and DT circuit design.