Title :
RoC: A Scalable Network on Chip Based on the Token Ring Concept
Author :
Deslauriers, François ; Langevin, Michel ; Bois, Guy ; Savaria, Yvon ; Paulin, Pierre
Author_Institution :
Ecole Polytechnique de Montreal, Que.
Abstract :
A recent practice in the development of SoCs is the integration of interconnect networks, since integration offers significant bandwidth increases. This allows implementing multiprocessor systems that communicate more effectively than bus based architectures. This paper proposes a rotator-on-chip (RoC) architecture as a new network-on-chip based on the token ring concept. This scalable network has been integrated into a system level exploration platform for characterization. Increased performance is confirmed and improvements are proposed to decrease packet latency through the network. Results show that the RoC supports a working load of 82%, compared to 58% for the hot potato mesh network and 28% for the SPIN fat tree network
Keywords :
multiprocessing systems; multiprocessor interconnection networks; network topology; network-on-chip; SPIN fat tree network; hot potato mesh network; interconnect networks; multiprocessor systems; network-on-chip; packet latency; rotator-on-chip; system level exploration; system-on-chip; token ring; Bandwidth; Costs; Delay; LAN interconnection; Multiprocessing systems; Network-on-a-chip; Performance analysis; Scalability; Telecommunication network topology; Token networks;
Conference_Titel :
Circuits and Systems, 2006 IEEE North-East Workshop on
Conference_Location :
Gatineau, Que.
Print_ISBN :
1-4244-0416-9
Electronic_ISBN :
1-4244-0417-7
DOI :
10.1109/NEWCAS.2006.250915
