DocumentCode
2728005
Title
Active ESD protection for input transistors in a 40-nm CMOS process
Author
Altolaguirre, Federico A. ; Ming-Dou Ker
Author_Institution
Inst. of Electron., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fYear
2015
fDate
27-29 April 2015
Firstpage
1
Lastpage
4
Abstract
This work presents a novel design for input ESD protection. By replacing the protection resistor with an active switch that isolates the input transistors from the pad under ESD stress, the ESD robustness can be greatly improved. The proposed designs were designed and verified in a 40-nm CMOS process using only thin oxide devices, which can successfully pass the typical industry ESD-protection specifications of 2-kV HBM and 200-V MM ESD tests.
Keywords
CMOS integrated circuits; MOSFET; electrostatic discharge; integrated circuit design; integrated circuit testing; semiconductor device testing; switches; CMOS process; HBM ESD testing; MM ESD testing; active input ESD protection; active switch; input transistor; resistor; size 40 nm; thin oxide device; voltage 2 kV; voltage 200 V; CMOS integrated circuits; CMOS process; Clamps; Electrostatic discharges; Logic gates; Stress; Switching circuits; CMOS ICs; ESD; ESD protection; Reliability;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, Automation and Test (VLSI-DAT), 2015 International Symposium on
Conference_Location
Hsinchu
Type
conf
DOI
10.1109/VLSI-DAT.2015.7114533
Filename
7114533
Link To Document