Title :
An impact of process variation on supply voltage dependence of logic path delay variation
Author :
Nishizawa, Shinichi ; Ishihara, Tohru ; Onodera, Hidetoshi
Author_Institution :
Grad. Sch. of Inf., Kyoto Univ., Kyoto, Japan
Abstract :
Dynamic Voltage and Frequency Scaling (DVFS) technique requires accurate observation of critical path delay for robust operation under aggressive supply voltage scaling. Logic paths contain several types of logic gates and path delay have voltage dependences because different logic gates have different voltage dependences. However, it is not well investigated that how the voltage dependence of the path delay changes induced by process variation. This paper describes the effect of the process variation on the voltage dependence of path delay. Ring Oscillator circuits fabricated in 65-nm CMOS process are used for the evaluation and analysis of the process variation dependence of the voltage delay curves.
Keywords :
CMOS analogue integrated circuits; CMOS logic circuits; delay circuits; logic gates; oscillators; CMOS process; DVFS technique; dynamic voltage and frequency scaling technique; logic gate; logic path delay variation; ring oscillator circuit; size 65 nm; supply voltage dependence; Delays; Frequency measurement; Logic gates; Oscillators; Sensitivity; Transistors; Very large scale integration;
Conference_Titel :
VLSI Design, Automation and Test (VLSI-DAT), 2015 International Symposium on
Conference_Location :
Hsinchu
DOI :
10.1109/VLSI-DAT.2015.7114534