An analog CMOS IC for template matching

Author

Biyabani, A.A. ; Carley, L.R. ; Kanado, T.

Author_Institution

Carnegie Mellon Univ., Pittsburgh, PA, USA

fYear

1999

fDate

17-17 Feb. 1999

Firstpage

82

Lastpage

85

Abstract

A 3 V 0.5 /spl mu/m CMOS analog IC correlates each 9/spl times/9 pixel window in an input image with 8 stored 9/spl times/9 templates at rates up to 5 MHz and outputs the best match. Core multiply-accumulators (MACs) use 5 pJ/multiply at 320/spl times/10/sup 6/ MAC/s for a 10/spl times/ energy improvement over digital ASIC MACs and 10/spl times/ over a general DSP. The overall IC performs data sequencing, 3.6/spl times/10/sup 9/ MAC/s, and max-finding, with 8 mV resolution, while consuming 420 mW.

Keywords

CMOS analogue integrated circuits; analogue multipliers; analogue processing circuits; image matching; image resolution; 0.5 micron; 3 V; 420 mW; 81 pixel; 9 pixel; analog CMOS IC; core multiply-accumulators; data sequencing; max-finding; resolution; template matching; Analog integrated circuits; Analog memory; CMOS analog integrated circuits; CMOS digital integrated circuits; CMOS image sensors; CMOS integrated circuits; Cameras; Digital integrated circuits; Digital signal processing; Pixel;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 1999. Digest of Technical Papers. ISSCC. 1999 IEEE International

Conference_Location

San Francisco, CA

ISSN

0193-6530

Print_ISBN

0-7803-5126-6

Type

conf

DOI

10.1109/ISSCC.1999.759122

Filename

759122