• DocumentCode
    2728621
  • Title

    Optimal Contexts for the Self-Test of Coarse Grain Dynamically Reconfigurable Processors

  • Author

    Inoue, Tomoo ; Fujii, Takashi ; Ichihara, Hideyuki

  • Author_Institution
    Grad. Sch. of Inf. Sci., Hiroshima City Univ., Asaminami
  • fYear
    2007
  • fDate
    20-24 May 2007
  • Firstpage
    117
  • Lastpage
    124
  • Abstract
    This paper proposes a self-test method of dynamically reconfigurable processors (DRPs) without area overhead. This method constructs a test frame of processor elements (PEs) such that it consists of test pattern generators, response analyzers and PEs under test, and switches several test frames dynamically so as to test all the PEs. Since the number of contexts and test application time are subject to the structure of test frames, we design several test frames with different structures and discuss the relationship of the structures to the number of contexts and test application time. Based on this discussion, we can construct the best test frame according to a given test environment.
  • Keywords
    automatic test pattern generation; built-in self test; integrated circuit testing; microprocessor chips; reconfigurable architectures; built-in self-test; coarse grain dynamically reconfigurable processor; processor elements; response analyzer; self-test method; test pattern generator; Automatic testing; Built-in self-test; Cost function; Field programmable gate arrays; Hardware; Pattern analysis; Registers; Switches; System testing; Test pattern generators; Dynamically reconfigurable processors; optimal contexts; self-test; test application time; test frames.;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Symposium, 2007. ETS '07. 12th IEEE European
  • Conference_Location
    Freiburg
  • Print_ISBN
    0-7695-2827-9
  • Type

    conf

  • DOI
    10.1109/ETS.2007.29
  • Filename
    4221583