Title :
The design and simulation of FIFO using self-timed based asynchronous circuit elements
Author :
Bahbouh, Hussein Tiawi ; Salama, Aly Ezzat ; Khalil, Ahmed Hussein
Author_Institution :
Fac. of Eng., Cairo Univ., Giza, Egypt
Abstract :
The objective of this paper is to introduce the basic elements utilized in the design of asynchronous circuits. CMOS designs are implemented. The performance of these elements is evaluated using SPICE simulator. FIFO pipelined structure was implemented utilizing self-timed asynchronous elements
Keywords :
CMOS logic circuits; asynchronous circuits; circuit simulation; integrated circuit design; logic CAD; logic simulation; pipeline processing; CMOS designs; FIFO; SPICE simulator; design; performance; pipelined structure; self-timed based asynchronous circuit elements; simulation; Asynchronous circuits; Boolean functions; CMOS logic circuits; Circuit simulation; Corporate acquisitions; Digital systems; Logic circuits; Protocols; SPICE; Timing;
Conference_Titel :
Radio Science Conference, 1998. NRSC '98. Proceedings of the Fifteenth National
Conference_Location :
Cairo
Print_ISBN :
0-7803-5121-5
DOI :
10.1109/NRSC.1998.711467
