DocumentCode :
2729195
Title :
A 25 kft 768 kb/s CMOS transceiver for multiple bit-rate DSL
Author :
Moyal, M. ; Groepl, M. ; Blon, T.
Author_Institution :
Siemens AG, Munich, Germany
fYear :
1999
fDate :
17-17 Feb. 1999
Firstpage :
244
Lastpage :
245
Abstract :
An all 0.5 /spl mu/m CMOS transceiver IC is capable of supporting 768 kb/s rates on a single copper loop. Trade-offs between data rate and loop length are afforded by support of multiple bit rates. The same transmitter concept is also integrated for asymmetric digital subscriber line (ADSL), and tested for downstream rates of 6000-8000 kb/s.
Keywords :
CMOS integrated circuits; digital subscriber lines; mixed analogue-digital integrated circuits; transceivers; 0.5 micron; 6000 to 8000 kbit/s; 768 kbit/s; CMOS; asymmetric digital subscriber line; data rate; downstream rates; loop length; multiple bit rates; multiple bit-rate DSL; single copper loop; transceivers; DSL; Digital filters; Filtering; Hybrid integrated circuits; Inductors; Linearity; Silicon; Solid state circuit design; Solid state circuits; Transceivers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 1999. Digest of Technical Papers. ISSCC. 1999 IEEE International
Conference_Location :
San Francisco, CA
ISSN :
0193-6530
Print_ISBN :
0-7803-5126-6
Type :
conf
DOI :
10.1109/ISSCC.1999.759215
Filename :
759215
Link To Document :
بازگشت