A System-level Design Method for Cognitive Radio on a Reconfigurable Multi-processor Architecture

Author

Zhang, Qiwei ; Kokkeler, Andre B J ; Smit, Gerard J M

Author_Institution

Univ. of Twente, Enschede

fYear

2007

fDate

20-21 Nov. 2007

Firstpage

1

Lastpage

4

Abstract

The future trend of software defined radio (SDR) platforms moves toward reconfigurable Multiprocessor System-on-Chips (MPSoCs). However, there is a gap between the modelling of the dynamic radio applications and the optimized implementation of the application on reconfigurable multiprocessor architectures. We aim to close this gap by applying a system level design method for the modelling and implementation of the applications on an MPSoC. The state-of-the-art radio technology based on SDR, Cognitive Radio, is considered as a design case to demonstrate the effectiveness of this method.

Keywords

cognitive radio; logic design; multiprocessing systems; reconfigurable architectures; software radio; system-on-chip; cognitive radio; dynamic radio application; reconfigurable multiprocessor system-on-chips architecture; software defined radio; system-level design method; task transaction level interface; Application software; Cognitive radio; Computer architecture; Design methodology; Digital signal processing; Field programmable gate arrays; OFDM modulation; Signal processing algorithms; System-level design; Tiles;

fLanguage

English

Publisher

ieee

Conference_Titel

System-on-Chip, 2007 International Symposium on

Conference_Location

Tampere

ISSN

07EX1846C

Print_ISBN

978-1-4244-1368-3

Electronic_ISBN

07EX1846C

Type

conf

DOI

10.1109/ISSOC.2007.4427419

Filename

4427419