• DocumentCode
    2729312
  • Title

    An FPGA-based Real-time Background Identification Circuit for 1080p Video

  • Author

    Genovese, Marco ; Napoli, E.

  • fYear
    2012
  • fDate
    25-29 Nov. 2012
  • Firstpage
    330
  • Lastpage
    335
  • Abstract
    The paper proposes an improved hardware implementation of the OpenCV version of the Gaussian Mixture Model (GMM) algorithm. Truncated binary multipliers and a ROM compression technique are employed to reduce hardware complexity while increasing circuit processing capability. The OpenCV GMM algorithm is adapted to allow the FPGA implementation while providing a minimal impact on the quality of the processed videos. When implemented on Virtex5 FPGA the proposed circuit is able to process High Definition (HD) video sequences at 30 frame per second (fps) improving the performances with respect to previously proposed implementations (-7.6% in area and +12.6% in speed).
  • Keywords
    Gaussian processes; field programmable gate arrays; high definition video; image sequences; video signal processing; FPGA-based real-time background identification circuit; Gaussian mixture model algorithm; HD video sequences; OpenCV GMM algorithm; ROM compression technique; Virtex5 FPGA implementation; circuit processing capability; hardware complexity reduction; high definition video sequences; improved hardware implementation; truncated binary multipliers; video processing quality; Field programmable gate arrays; Hardware; Integrated circuit modeling; Read only memory; Real-time systems; Streaming media; Video sequences; Field programmable gate arrays; High definition video; Object detection; real time systems;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signal Image Technology and Internet Based Systems (SITIS), 2012 Eighth International Conference on
  • Conference_Location
    Naples
  • Print_ISBN
    978-1-4673-5152-2
  • Type

    conf

  • DOI
    10.1109/SITIS.2012.55
  • Filename
    6395113