DocumentCode :
2729317
Title :
Characterization of small trapping sets in LDPC codes from Steiner triple systems
Author :
Laendner, Stefan ; Milenkovic, Olgica ; Huber, Johannes B.
Author_Institution :
Fraunhofer Inst. for Integrated Circuits IIS, Erlangen, Germany
fYear :
2010
fDate :
6-10 Sept. 2010
Firstpage :
93
Lastpage :
97
Abstract :
The error-floor performance of low-density parity-check (LDPC) codes under iterative decoding is governed by combinatorial configurations in the Tanner graph of the code termed trapping sets. Finding the smallest trapping set in a Tanner graph is an NP-hard problem. However, for codes constructed from designs one can partially characterize trapping sets and enumerate them efficiently. We focus on LDPC codes based on Steiner triple systems (STS), and quantify small trapping sets for bit-flipping decoding over the BSC and small trapping sets for the AWGN channel. Furthermore, we provide simulation results that show that the enumeration scheme at hand provides good estimates for the error-floor behavior of STS LDPC codes.
Keywords :
AWGN channels; iterative decoding; parity check codes; AWGN channel; LDPC codes; Steiner triple systems; density parity-check codes; error-floor performance; iterative decoding; small trapping sets; Charge carrier processes; Decoding; Lead;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Turbo Codes and Iterative Information Processing (ISTC), 2010 6th International Symposium on
Conference_Location :
Brest
Print_ISBN :
978-1-4244-6744-0
Electronic_ISBN :
978-1-4244-6745-7
Type :
conf
DOI :
10.1109/ISTC.2010.5613812
Filename :
5613812
Link To Document :
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