Title :
Heuristics for Scenario Creation to Enable General Loop Transformations
Author :
Palkovic, Martin ; Corporaal, H. ; Catthoor, Francky
Author_Institution :
lMEC Lab., Leuven
Abstract :
Embedded system applications can have quite complex control flow graphs (CFGs). Often their control flow prohibits design time optimizations, like advanced global loop transformations. To solve this problem, and enable far more global optimizations, we could consider paths of the CFG in isolation. However coding all paths separately would cause a tremendous code copying. In practice we have to trade-off the extra optimization opportunities vs. the code size. To make this trade-off, in this paper we use so-called system scenarios. These scenarios bundle similar control paths, while still allowing sufficient optimizations. The problem treated in this paper is: what are the right scenarios; i.e., which paths should be grouped together. For complex CFGs the number of possible scenarios (ways of grouping CFG paths) is huge; it grows exponentially with the number of CFG paths. Therefore heuristics are needed to quickly discover reasonable groupings. The main contribution of this paper is that we propose and evaluate three of these heuristics on both synthetic benchmarks and on a real-life application.
Keywords :
data flow graphs; embedded systems; optimisation; program control structures; advanced global loop transformation; control flow graph; design time optimization; embedded system; Control systems; Counting circuits; Design optimization; Dynamic scheduling; Flow graphs; Multimedia systems; Processor scheduling; Solid modeling; Space exploration; Yarn;
Conference_Titel :
System-on-Chip, 2007 International Symposium on
Conference_Location :
Tampere
Print_ISBN :
978-1-4244-1368-3
Electronic_ISBN :
07EX1846C
DOI :
10.1109/ISSOC.2007.4427430