Title :
A CMOS interface circuit for detection of 1.2 Gb/s RZ data
Author :
Savoj, Jafar ; Razavi, Behzad
Author_Institution :
California Univ., Los Angeles, CA, USA
Abstract :
This CMOS interface circuit is used in a radar system that digitizes the reflected signal by a multi-gigahertz analog-to-digital converter (ADC) employing Josephson junctions, producing a return-to-zero (RZ) differential binary stream with 2 mV peak-to-peak amplitude at 1.2 Gb/s. The interface amplifies, detects, and demultiplexes the signal, generating a parallel output with 1 V/sub pp/ amplitude at 150 Mb/s so the subsequent digital signal processor can receive and process the data reliably.
Keywords :
CMOS integrated circuits; analogue-digital conversion; demultiplexing equipment; matched filters; radar equipment; superconducting integrated circuits; 1.2 Gbit/s; 2 mV; CMOS interface circuit; Josephson junctions; RZ data; demultiplexing; digital signal processor; multi-gigahertz analog-to-digital converter; parallel output; radar system; reflected signal; return-to-zero differential binary stream; Clocks; Low-noise amplifiers; Matched filters; Preamplifiers; Signal analysis; Solid state circuits;
Conference_Titel :
Solid-State Circuits Conference, 1999. Digest of Technical Papers. ISSCC. 1999 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
0-7803-5126-6
DOI :
10.1109/ISSCC.1999.759246
