Title :
A 0.13µm inductively degenerated cascode CMOS LNA at 2.14GHz
Author :
Muhamad, M. ; Soin, N. ; Ramiah, H. ; Noh, N.M. ; Keat, C.W.
Author_Institution :
Fac. of Electr. Eng., Univ. Teknol. MARA, Shah Alam, Malaysia
Abstract :
A 130-nm CMOS low-noise amplifier (LNA) for WCDMA applications is presented. The circuit adopts an inductively degenerated cascode topology. A detailed methodology using power constraint noise optimization (PCNO) method that leads to an optimum width of the LNA is presented. A theoretical noise figure optimization using fixed power was used as a design optimization guide. This inductively degenerated cascade topology show good noise performance which it achieve a noise figure of 1.32dB while provides a forward gain, S21 of 18.24 dB from a 1.2V voltage supply. The input reflection coefficient, S11 is -19 dB.
Keywords :
CMOS analogue integrated circuits; UHF amplifiers; code division multiple access; low noise amplifiers; PCNO method; WCDMA applications; design optimization guide; frequency 2.14 GHz; gain 18.24 dB; inductively-degenerated cascade topology; inductively-degenerated cascode CMOS LNA; low-noise amplifier; noise figure 1.32 dB; power constraint noise optimization method; size 0.13 mum; theoretical noise figure optimization; voltage 1.2 V; Gain; Multiaccess communication; Noise; Noise figure; Spread spectrum communication; Topology; Transistors; Cascode LNA; Inductively degenerated; Power Constraint Noise Optimization (PCNO); WCDMA;
Conference_Titel :
Industrial Electronics and Applications (ISIEA), 2011 IEEE Symposium on
Conference_Location :
Langkawi
Print_ISBN :
978-1-4577-1418-4
DOI :
10.1109/ISIEA.2011.6108680