DocumentCode :
2729990
Title :
Factorial Analysis of Chip-on-Metal WLCSP Technology with Fan-Out Capability
Author :
Yew, M.C. ; Yuan, C. ; Han, C.N. ; Huang, C.S. ; Yang, W.K. ; Chiang, K.N.
Author_Institution :
Adv. Microsyst. Packaging & Nano-Mech. Res. Lab., Nat. Tsing Hua Univ., Hsin-Chu
fYear :
2006
fDate :
3-7 July 2006
Firstpage :
223
Lastpage :
228
Abstract :
In this study, a wafer level chip scaled packaging (WLCSP) having the capability of redistributing the electrical circuit is proposed to resolve the problem of assembling a fine-pitched chip to a coarse-pitched substrate. In the fan-out WLCSP, the solder bumps could be located on both the filler polymer and chip surface. The concept of the fan-out WLCSP and the processes of fabricating the novel fan-out WLCSP would be described. In addition, the reliability characteristic of the fan-out WLCSP in packaging level is described by using the two-dimensional finite element model. The 25 factorial designs with the analysis of variance (ANOVA) are conducted to obtain the sensitivity information of the packaging
Keywords :
chip scale packaging; filled polymers; fine-pitch technology; microassembling; solders; chip-on-metal; factorial analysis; fan-out WLCSP; filler polymer; fine-pitched chip; solder bumps; wafer level chip scaled packaging; Assembly; Chip scale packaging; Electronic packaging thermal management; Electronics packaging; Integrated circuit packaging; Packaging machines; Polymers; Semiconductor device packaging; Thermal stresses; Wafer scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits, 2006. 13th International Symposium on the
Conference_Location :
Singapore
Print_ISBN :
1-4244-0205-0
Electronic_ISBN :
1-4244-0206-9
Type :
conf
DOI :
10.1109/IPFA.2006.251035
Filename :
4017060
Link To Document :
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