A methodology for automation structured datapath placement In VLSI design

Manual place-and-route method in handling structured datapath placement usually requires long design cycles and high design cost. To minimize the human effort in placing cells, Integrated Circuit Compiler (ICC) has been introduced to help user in automate place and route with its powerful embedded placement algorithm. A structured datapath design contains repeating dataflow logics, which is highly regular and structured. Currently, the automated placement tool from ICC is incapable to place structured datapath design effectively. This paper describes an approach for customizing the ICC tool to automate structured datapath placement in Very Large Scaled Integrated (VLSI) layout and achieve better placement quality. An algorithm named structured datapath relative placement (SDP-RP) is proposed to obtain the relative placement (RP) of a SDP design. From the initial placement generated by ICC, structured registers are extracted. Connectivity of all the related cells is traced to form the RP groups for each structured pattern. The relative placement constraint file containing RP groups is generated and read by ICC tool to improve placement optimization process. The implementation of this algorithm in ICC placement flow for SDP design has achieved structural placement with 2~24% timing improvement and cell counts reduction.