Title :
A 580 MHz RISC microprocessor in SOI
Author :
Canada, M. ; Akrout, C. ; Cawthron, D. ; Corr, Jamie ; Geissler, S. ; Houle, R. ; Kartschoke, P. ; Kramer, Daniel ; McCormick, Patrick ; Rohrer, N. ; Salem, Gerard ; Warriner, L.
Author_Institution :
Microelectron. Div., IBM Corp., Essex Junction, VT, USA
Abstract :
A RISC microprocessor remapped in SOI technology exploits the advantages of SOI to boost processor frequency by 20% to 580MHz at 2.0V and 85/spl deg/C and fast process. The separation by implanted oxygen (SIMOX) SOI process produces partially-depleted devices. Source and drain capacitances are reduced by an order of magnitude, improving gate delay by 12%. Reduction in body-bias effects on device stacks and passgate topologies results in an additional 15%-25% improvement. Speed gains of up to 35% are achieved in some designs. The frequency-limiting paths in this processor are dominated by SRAM access and self-timed dynamic circuits whose timing had to be relaxed to guarantee functionality.
Keywords :
SIMOX; capacitance; delays; microprocessor chips; reduced instruction set computing; 2.0 V; 580 MHz; 85 degC; RISC microprocessor; SIMOX; SOI technology; SRAM access; body-bias effects; device stacks; drain capacitance; frequency-limiting paths; gate delay; partially-depleted devices; passgate topologies; processor frequency; self-timed dynamic circuits; source capacitance; speed gains; Delay effects; Frequency; Inverters; Microprocessors; Paper technology; Power dissipation; Reduced instruction set computing; Solid state circuits; Switches; Voltage;
Conference_Titel :
Solid-State Circuits Conference, 1999. Digest of Technical Papers. ISSCC. 1999 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
0-7803-5126-6
DOI :
10.1109/ISSCC.1999.759340