A 1.8 mW CMOS /spl Sigma//spl Delta/ modulator with integrated mixer for A/D conversion of IF signals

Author

Breems, L.J. ; van de Zwan, E.J. ; Dijkmans, E.C. ; Huijsing, J.H.

Author_Institution

Delft Univ. of Technol., Netherlands

fYear

1999

fDate

17-17 Feb. 1999

Firstpage

52

Lastpage

53

Abstract

This CMOS IF/spl Sigma//spl Delta/ modulator combines the functions of an IF mixer and an anti-aliasing filter with a continuous-time (CT) baseband /spl Sigma//spl Delta/ modulator for A/D conversion of IF signals in radio receivers. Advantage is taken of the high linearity and low-power of the CT baseband /spl Sigma//spl Delta/ modulator. The resulting IF/spl Sigma//spl Delta/ modulator consumes 1.8 mW and has +36 dBV IP3. The IF /spl Sigma//spl Delta/ modulator of this paper is for mobile phones (GSM specification), and is promising for application in other types of receivers.

Keywords

CMOS integrated circuits; antialiasing; cellular radio; continuous time systems; low-power electronics; modulators; sigma-delta modulation; /spl Sigma//spl Delta/ modulator; 1.8 mW; A/D conversion; CMOS; GSM specification; IF signals; anti-aliasing filter; continuous-time baseband modulator; integrated mixer; linearity; low-power; mobile phones; radio receivers; Baseband; Clocks; Computed tomography; Delta modulation; Energy consumption; Filters; Frequency; Linearity; Mixers; Switches;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 1999. Digest of Technical Papers. ISSCC. 1999 IEEE International

Conference_Location

San Francisco, CA

ISSN

0193-6530

Print_ISBN

0-7803-5126-6

Type

conf

DOI

10.1109/ISSCC.1999.759363

Filename

759363