DocumentCode :
2731154
Title :
Study of Design Factors Affecting Turn-on Time of Silicon Controlled Rectifiers (SCRS) in 90 and 65nm Bulk CMOS Technologies
Author :
Di Sarro, James ; Chatty, Kiran ; Gauthier, Robert ; Rosenbaum, Elyse
Author_Institution :
Dept. of Electr. & Comput. Eng., Illinois Univ., Urbana, IL
fYear :
2006
fDate :
26-30 March 2006
Firstpage :
163
Lastpage :
168
Abstract :
We explore the effect of layout factors on the turn-on time of silicon controlled rectifiers (SCRs) in 90nm and 65nm bulk CMOS technologies. Using a very fast transmission line pulse (VFTLP) tester, we show that a SCR in 65nm bulk CMOS technology can achieve a turn-on time of 500ps with proper design. Using device simulations, we identify factors limiting SCR turn-on time and provide a basis for the presented experimental results
Keywords :
CMOS integrated circuits; electrostatic discharge; integrated circuit layout; overcurrent protection; thyristors; 65 nm; 90 nm; SCR; bulk CMOS technology; device simulations; layout factors; protection circuits; silicon controlled rectifiers; very fast transmission line pulse tester; Anodes; CMOS technology; Cathodes; Circuit testing; Diodes; Electrostatic discharge; Protection; Thyristors; Trigger circuits; Voltage; ESD protection circuits; Electrostatic discharge (ESD); Silicon Controlled Rectifier (SCR);
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Reliability Physics Symposium Proceedings, 2006. 44th Annual., IEEE International
Conference_Location :
San Jose, CA
Print_ISBN :
0-7803-9498-4
Electronic_ISBN :
0-7803-9499-2
Type :
conf
DOI :
10.1109/RELPHY.2006.251210
Filename :
4017151
Link To Document :
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