Determination of Time to Breakdown of 0.8-1.2 nm EOT HfSiON Gate Dielectrics with Poly-Si and Metal Gate Electrodes

The breakdown behaviors of ultra-thin HfSiON gate dielectrics have been investigated to provide a clear determination of time to breakdown T_bd. Abrupt jumps in gate leakage current I_g under negative stress voltage were readily observed by using small area devices, even in sub-0.9-nm EOT HfSiON. In the case of positive bias stress, an abrupt jump in I_g under stress voltage was hardly observed. Rather than observing gate leakage current I_g, we could determine the T_bd by the abrupt jump in substrate current I_sub in carrier separation measurement using nMOSFETs. By using this method, the initial breakdown event could be sensitively detected and T_bd under the both biases can be handled with the Weibull distribution. Therefore conventional procedures for gate area conversion and failure rate extrapolation are expected to be valid, even for the ultra-thin HfSiON gate dielectrics