Low power CMOS logic families

Author

Adam, M.W. ; Elmasry, M.I.

Author_Institution

VLSI Res. Group, Waterloo Univ., Ont., Canada

fYear

1998

fDate

9-12 Aug 1998

Firstpage

419

Lastpage

422

Abstract

Low power design is the key for wireless communication devices and portable computing systems. Many logic families are suggested as candidates for low power design. In this paper we compare four famous logic families as candidates for low power and high performance logic circuits. The comparisons are based on power delay and interference produced. A 16 bit carry look ahead adder is used to compare the performance of the four logic families at different operating conditions

Keywords

CMOS logic circuits; adders; delays; integrated circuit design; low-power electronics; 16 bit; carry look ahead adder; high performance logic circuits; interference; low power CMOS logic; low power design; operating conditions; portable computing systems; power delay; wireless communication devices; Adders; Batteries; CMOS logic circuits; Delay; Logic circuits; Logic design; Logic devices; Power dissipation; Vehicle dynamics; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1998. Proceedings. 1998 Midwest Symposium on

Conference_Location

Notre Dame, IN

Print_ISBN

0-8186-8914-5

Type

conf

DOI

10.1109/MWSCAS.1998.759520

Filename

759520

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2732869