A hardware/software co-design model for face recognition using Cognimem Neural Network chip

Automated Face recognition is a technique employed in wide-range of practical applications, which include access control, identification systems, surveillance and law enforcement applications to name a few, and future improvements promise to spread the use of face recognition further still. Radial Basis Function Networks (RBFN) have proven effective approach for face recognition. Software implementations fail to capture the inherent parallelism of RBFN and incur long training time. Although, hardware implementations can speed up the training process, they may lead to inflexible solution. The main challenges of Face Recognition today are broad lightning variations, handling rotation in depth, together with personal appearance changes. A highly accurate face recognition system requires a number of complex sub-operations to be performed. To balance the flexibility of the involved sub-modules and to achieve high accuracy in face recognition, we propose an embedded computing system, consisting of a processor and dedicated fully parallelized Cognimem Neural Network chip based board. We will also identify the optimized algorithm for each of the involved sub-operations. Results obtained after testing our proposed system, with standard databases, show promising performances in terms of Recognition accuracy, False acceptance rate (FAR), False rejection rate (FRR), training time and testing time.