Investigation of Charge Loss in Cycled NBit Cells via Field and Temperature Accelerations

Author

Tsai, W.J. ; Zous, N.K. ; Chen, H.Y. ; Liu, Lenvis ; Yeh, C.C. ; Chen, Sam ; Lu, W.P. ; Wang, Tahui ; Ku, Joseph ; Lu, Chih-Yuan

Author_Institution

Macronix Int. Co. Ltd, Hsin-Chu

fYear

2006

fDate

26-30 March 2006

Firstpage

693

Lastpage

694

Abstract

In nitride storage flash memories, the high-V_T state retention loss induced by field and temperature acceleration is compared between single cells and products. Our result reveal that the charge loss path is the same no matter which accelerating methods is used. The traps created at the bottom oxide during P/E cycling provide such leak paths. In addition, the annealing of interface states would play a role in the V_T loss during high-temperature bake

Keywords

annealing; flash memories; integrated circuit reliability; interface states; semiconductor storage; Nbit cells; P/E cycling; bottom oxide; charge loss investigation; charge loss path; field accelerations; high-temperature bake; interface states annealing; leak paths; nitride storage flash memories; state retention loss; temperature accelerations; traps; Acceleration; Annealing; Electron traps; Flash memory; Interface states; Power generation; Reactive power; Temperature; Testing; Tunneling;

fLanguage

English

Publisher

ieee

Conference_Titel

Reliability Physics Symposium Proceedings, 2006. 44th Annual., IEEE International

Conference_Location

San Jose, CA

Print_ISBN

0-7803-9498-4

Electronic_ISBN

0-7803-9499-2

Type

conf

DOI

10.1109/RELPHY.2006.251328

Filename

4017269