• DocumentCode
    2733679
  • Title

    Compensation of CMOS op-amps using split-length transistors

  • Author

    Saxena, Vishal ; Baker, R. Jacob

  • Author_Institution
    E.C.E. Dept., Univ. of Texas at Austin, Austin, TX
  • fYear
    2008
  • fDate
    10-13 Aug. 2008
  • Firstpage
    109
  • Lastpage
    112
  • Abstract
    Theoretical and experimental results are presented for op-amp compensation using split-length transistors. By using split-length devices the right-half plane zero which plagues op-amp performance can be eliminated. Experimental results indicate substantial enhancements in speed while reducing power consumption and layout area. Further, these techniques can be used to compensate op-amps when using small supply voltage (VDD).
  • Keywords
    CMOS analogue integrated circuits; compensation; operational amplifiers; CMOS op-amps compensation; layout area; power consumption; small supply voltage; split-length transistors; Capacitance; Capacitors; Feedforward systems; Frequency; Impedance; Operational amplifiers; Output feedback; Poles and zeros; Topology; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2008. MWSCAS 2008. 51st Midwest Symposium on
  • Conference_Location
    Knoxville, TN
  • ISSN
    1548-3746
  • Print_ISBN
    978-1-4244-2166-4
  • Electronic_ISBN
    1548-3746
  • Type

    conf

  • DOI
    10.1109/MWSCAS.2008.4616748
  • Filename
    4616748
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2733679