Susceptibility of PMOS Transistors under High RF Excitations at Source Pin

This work analyses the operation point shift of PMOS transistors at high electromagnetic interference levels. These devices are typically connected to supply rails of integrated circuits. In this configuration their source connections are subjected to RF disturbances. We provide measurement and simulation results of such interferences and their effects. The results reveal a complex behaviour at low frequencies when the power level is varied. This behaviour is caused by both non-linear characteristics of the intrinsic PMOS transistor and the turn-on of the parasitic drain-bulk diode at higher power levels. It is relevant up to RF frequencies of several hundred MHz.