DocumentCode :
2734786
Title :
Hardware-software codesign with GRAPE
Author :
Adé, Marleen ; Lauwereins, Rudy ; Peperstraete, J.A.
Author_Institution :
ESAT, Katholieke Univ., Leuven, Heverlee, Belgium
fYear :
1995
fDate :
7-9 Jun 1995
Firstpage :
40
Lastpage :
47
Abstract :
GRAPE-II (Graphical Rapid Prototyping Environment-II) is a hardware-software codesign environment for the real-time functional emulation of synchronous DSP systems. It allows one to specify the application´s data dependency graph in a target-machine-independent way. After specifying the heterogeneous target machine´s architecture, it estimates the resources needed by each application subtask. Based on these requirements, it assigns the subtasks to specific target devices at compile-time, be they processors or FPGAs, establishes routing paths and determines a static schedule. It generates a main shell for each target device and generates intra-device and inter-device communication code. After downloading the executable images on to the target machine, it allows the designer to modify end-user controls and application settings at run-time. This paper situates the tool in the application design cycle, explains GRAPE-II´s design flow and shows the advantages of hardware-software codesign by evaluating the achievable sampling frequency for a small example application
Keywords :
computer aided software engineering; formal specification; formal verification; logic CAD; logic design; project support environments; real-time systems; software prototyping; GRAPE-II; Graphical Rapid Prototyping Environment; application data dependency graph specification; application design cycle; compile-time application subtask assignment; design flow; executable image downloading; hardware-software codesign environment; heterogeneous target machine architecture specification; inter-device communication code generation; intra-device communication code generation; real-time functional emulation; resource requirements specification; routing paths; run-time application settings modification; run-time end-user controls modification; sampling frequency; static schedule; synchronous DSP systems; target device shell; target-machine independence; Communication system control; Digital signal processing; Emulation; Field programmable gate arrays; Pipelines; Processor scheduling; Prototypes; Real time systems; Routing; Runtime;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Rapid System Prototyping, 1995. Proceedings., Sixth IEEE International Workshop on
Conference_Location :
Chapel Hill, NC
ISSN :
1074-6005
Print_ISBN :
0-8186-7100-9
Type :
conf
DOI :
10.1109/IWRSP.1995.518569
Filename :
518569
Link To Document :
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