A high efficiency sigma-delta based direct digital amplifier

A digital input class-D amplifier that reduces the harmonics of the output signal has been implemented. The structure consists of a sigma-delta modulator which converts a 12-bit input signal into a 1-bit signal at the clock frequency of 2.5 MHz. The H-Bridge is made part of the modulator and power supply rejection is achieved using an ADC in the feedback loop. The proposed structure, designed and implemented using 2.5 V TSMC 0.25 u process, enables the in-band noise suppression, improvement in signal-to-noise ratio and reduction in the switching losses and hence the size of the low-pass filter at the output.