A prototyping system for verification and evaluation in hardware-software cosynthesis

Author

Benner, Th. ; Ernst, R. ; Könenkamp, I. ; Schüler, P. ; Schaub, H.-C.

Author_Institution

Inst. fur Datenverarbeitungsanlagen, Tech. Univ. Braunschweig, Germany

fYear

1995

fDate

7-9 Jun 1995

Firstpage

54

Lastpage

59

Abstract

We present a system emulator for rapid prototyping of small embedded HW/SW-systems with hard timing constraints generated by a HW/SW cosynthesis system. It consists of a standard core processor and an application specific coprocessor, which is emulated by XILINX FPGAs. A byte slice architecture allows to emulate rather complex coprocessors. The system emulator supports the prototyping, debugging and time measurement in a comfortable way

Keywords

circuit analysis computing; coprocessors; field programmable gate arrays; logic CAD; logic design; program debugging; program verification; real-time systems; software prototyping; XILINX FPGAs; application specific coprocessor; byte slice architecture; debugging; evaluation; hard timing constraints; hardware-software cosynthesis; prototyping system; standard core processor; system emulator; time measurement; verification; Application software; Coprocessors; Debugging; Embedded software; Emulation; Field programmable gate arrays; Hardware; Prototypes; Software prototyping; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

Rapid System Prototyping, 1995. Proceedings., Sixth IEEE International Workshop on

Conference_Location

Chapel Hill, NC

ISSN

1074-6005

Print_ISBN

0-8186-7100-9

Type

conf

DOI

10.1109/IWRSP.1995.518571

Filename

518571