Rapid prototyping fault-tolerant heterogeneous digital signal processing systems

An approach is presented that permits the configuration of application specific hardware, with arbitrary hardware redundancy, to match the signal flow graph of arbitrary applications. The hardware is mapped to the signal flow graph of an application. An inventory of heterogeneous processors, specialized to perform a predefined set of functions, enables rapid prototyping of systems with arbitrary topologies. Application specific systems that match the signal flow graph of applications outperform general purpose systems in speed and throughput. This research focuses on solving the problems associated with the interconnection of the heterogeneous building blocks. A communication architecture is proposed that allows the interconnection of processors with varying speed and functionalities. Standardization of the interface control unit (ICU) greatly reduces the development cost by removing the need to design custom interfaces. The ICU permits the introduction of varying degree of hardware redundancy into the topology at the system, cluster or processor level