Title :
Implementation of pipelined data encryption standard (DES) using Altera CPLD
Author :
Chueng, Teo Pock ; Yusoff, Zulkalnain Mohd ; Sha´ameri, Ahmad Zuri
Author_Institution :
Fac. of Electr. Eng., Univ. Teknologi Malaysia, Johor, Malaysia
Abstract :
The paper presents a pipelined data encryption standard (DES) architecture design implemented in Altera CPLD. The architecture contains three main parts, DES module, pipeline module and control unit module. A four-segment pipeline is used in this architecture to burst the throughput of the DES. Although the processing time for a single encryption operation is still the same; but with more encryption operations, this pipelined DES can increase significantly the throughput. Altera Hardware Description Language (AHDL) is used to implement the pipelined DES design
Keywords :
code standards; cryptography; hardware description languages; pipeline processing; programmable logic devices; telecommunication security; telecommunication standards; AHDL; Altera CPLD; Altera Hardware Description Language; CMOS RAM; DES architecture design; DES module; Internet; control unit module; pipeline module; pipelined DES design; pipelined data encryption standard; processing time; throughput; ANSI standards; Cryptography; Hardware design languages; ISO standards; Internet; Mobile communication; Pipelines; Privacy; Protection; Throughput;
Conference_Titel :
TENCON 2000. Proceedings
Conference_Location :
Kuala Lumpur
Print_ISBN :
0-7803-6355-8
DOI :
10.1109/TENCON.2000.892211
